///
HAL_StatusTypeDef HAL_DAC_Start_DMA_DBM(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t *pData1, uint32_t Length) {
uint32_t tmpreg = 0U;
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(Channel));
// assert_param(IS_DAC_ALIGN(Alignment));
/* Process locked */
__HAL_LOCK(hdac);
/* Change DAC state */
hdac->State = HAL_DAC_STATE_BUSY;
/* Set the DMA transfer complete callback for channel2 */
hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
/* Set the DMA half transfer complete callback for channel2 */
hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
/* Set the DMA error callback for channel2 */
hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
/* Enable the selected DAC channel2 DMA request */
hdac->Instance->CR |= DAC_CR_DMAEN2;
/* Case of use of channel 2 */
/* Get DHR12R2 address */
tmpreg = (uint32_t) &hdac->Instance->DHR12R2;
/* Enable the DAC DMA underrun interrupt */
__HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
/* Enable the DMA Stream */
HAL_DMAEx_MBStart_IT(hdac->DMA_Handle2, (uint32_t) pData, tmpreg, (uint32_t) pData1, Length);
/* Enable the Peripheral */
__HAL_DAC_ENABLE(hdac, Channel);
/* Process Unlocked */
__HAL_UNLOCK(hdac);
/* Return function status */
return HAL_OK;
}
HAL_StatusTypeDef HAL_DMAEx_MBStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress,
uint32_t SecondMemAddress, uint32_t DataLength) {
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
if (HAL_DMA_STATE_READY == hdma->State) {
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
/* Initialize the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
/* Enable the Double buffer mode */
hdma->Instance->CR |= (uint32_t) DMA_SxCR_DBM;
/* Configure DMA Stream destination address */
hdma->Instance->M1AR = SecondMemAddress;
/* Configure the source, destination address and the data length */
//DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
hdma->Instance->NDTR = DataLength;
/* Peripheral to Memory */
/* Configure DMA Stream destination address */
hdma->Instance->PAR = DstAddress;
/* Configure DMA Stream source address */
hdma->Instance->M0AR = SrcAddress;
/* Clear all flags */
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
/* Enable Common interrupts*/
hdma->Instance->CR |= DMA_IT_TC;
/* Enable the peripheral */
__HAL_DMA_ENABLE(hdma);
} else {
/* Process unlocked */
__HAL_UNLOCK(hdma);
/* Return error status */
status = HAL_BUSY;
}
return status;
}
